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GAL22V10D-7LJNI bảng dữ liệu (PDF) - Lattice Semiconductor

GAL22V10D-7LJNI Datasheet PDF - Lattice Semiconductor
tên linh kiện GAL22V10D-7LJNI
tải về  GAL22V10D-7LJNI tải về

kích thước tập tin   718.73 Kbytes
Page   23 Pages
nhà sản xuất  LATTICE [Lattice Semiconductor]
Trang chủ  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor
Giải thích chi tiết về linh kiện Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

GAL22V10D-7LJNI Datasheet (PDF)

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GAL22V10D-7LJNI Datasheet PDF - Lattice Semiconductor

tên linh kiện GAL22V10D-7LJNI
tải về  GAL22V10D-7LJNI Click to download

kích thước tập tin   718.73 Kbytes
Page   23 Pages
nhà sản xuất  LATTICE [Lattice Semiconductor]
Trang chủ  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor
Giải thích chi tiết về linh kiện Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet.

GAL22V10D-7LJNI bảng dữ liệu (HTML) - Lattice Semiconductor

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GAL22V10D-7LJNI Thông tin chi tiết sản phẩm

Description

The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much less power when compared to bipolar 22V10 devices. E2 technology offers high speed (<100ms) erase times, providing the ability to reprogram or reconfigure the device quickly and efficiently.



Features

• HIGH PERFORMANCE E2CMOS®TECHNOLOGY

— 4 ns Maximum Propagation Delay

— Fmax = 250 MHz

— 3.5 ns Maximum from Clock Input to Data Output

— UltraMOS®Advanced CMOS Technology

• ACTIVE PULL-UPS ON ALL PINS

• COMPATIBLE WITH STANDARD 22V10 DEVICES

— Fully Function/Fuse-Map/Parametric Compatible with Bipolar and UVCMOS 22V10 Devices

• 50% to 75% REDUCTION IN POWER VERSUS BIPOLAR

— 90mA Typical Icc on Low Power Device

— 45mA Typical Icc on Quarter Power Device

•E2CELL TECHNOLOGY

— Reconfigurable Logic

— Reprogrammable Cells

— 100% Tested/100% Yields

— High Speed Electrical Erasure (<100ms)

— 20 Year Data Retention

• TEN OUTPUT LOGIC MACROCELLS

— Maximum Flexibility for Complex Logic Designs

• PRELOAD AND POWER-ON RESET OF REGISTERS

— 100% Functional Testability

• APPLICATIONS INCLUDE:

— DMA Control

— State Machine Control

— High Speed Graphics Processing

— Standard Logic Speed Upgrade

• ELECTRONIC SIGNATURE FOR IDENTIFICATION




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