# SN54HC74 / SN74HC74 Dual D-Type Positive-Edge-Triggered Flip-Flops

## Features & Description

️· Function: Dual D-type positive-edge-triggered flip-flops with clear and preset.
️· Logic: Data is transferred on the positive-going edge of the clock pulse. Clear (CLR) and Preset (PRE) inputs override other inputs.
️· Operating Voltage: 2V to 6V
️· Applications: General-purpose logic, data storage, shift registers.

## Electrical Characteristics

️· Input Voltage (VI): 0V to VCC
️· Output Voltage (VO): 0V to VCC
️· Absolute Maximum Ratings: VCC (–0.5V to 7V), Input/Output Clamp Current (±20mA).
️· Recommended Operating Conditions: VCC (2V-6V), Operating Temperature (-55°C to 85°C / -40°C to 85°C).

## Timing Requirements

️· Clock Frequency (fclock): Up to 36 MHz (depending on VCC).
️· Setup Time (tsu): Minimum time data must be stable before clock edge.

️· Hold Time (th): Minimum time data must remain stable after clock edge.
️· Pulse Duration (tw): Minimum pulse width for PRE/CLR signals.

## Package Options

️· CDIP (J)
️· CFP (W)
️· LCCC (FK)
️· PDIP (N)
️· SOIC (D)
️· SSOP (DB)
️· TSSOP (PW)

## Ordering Information

️· Various package and temperature grade options available (e.g., SN74HC74N, SN74HC74D, SN74HC74DR).
️· Military grade versions also available (e.g., SNJ54HC74J).